Search - fifo code

[SCM] IA4420FIFO(C51)

Description: IA4420的FIFO操作源代码，是c51语言写的，不过移植起来很容易。-IA4420 the FIFO operation source code is written in C51 language, but the transplant is easy.
Platform: | Size: 1024 | Author: 刘先生 | Hits:

Description: 操作系统请求页式管理置换算法的FIFO、LRU、OPT算法实验源代码-Operating system management request page replacement algorithm for FIFO, LRU, OPT algorithm experimental source code
Platform: | Size: 2048 | Author: 江彪 | Hits:

[VHDL-FPGA-Verilog] VHDL-ram_fifo

Description: VHDL的ram和fifo model code 包含众多的厂家-VHDL the ram and fifo model code contains a large number of manufacturers
Platform: | Size: 1678336 | Author: SL | Hits:

[VHDL-FPGA-Verilog] yibufifo

Description: 详细说明异步fifo的设计格雷码在地址的编码中的作用，及满空标志的产生-Detailed design of asynchronous fifo Gray code in the address of the code in effect and the emergence of Man flag
Platform: | Size: 238592 | Author: 刘留 | Hits:

[Driver Develop] isotransfer

Description: 给做Cypress FX2 68013固件设计的朋友一点参考源代码，希望对你们有用！-Cypress FX2 68013 to make friends point firmware reference design source code, in the hope that useful to you!
Platform: | Size: 165888 | Author: yangyu | Hits:

[source in ebook] VHDL

Description: 高质量的VHDL代码乒乓处理FIFO缓存-High-quality VHDL code deal with ping-pong FIFO cache
Platform: | Size: 1024 | Author: wode | Hits:

[USB develop] usb

Description: 使用68013的测试程序，包含68013固件程序（采用slave FIFO bulk同步读写，EP2 OUT，EP6 IN），驱动，PC端测试用程序。CPLD的VHDL代码-Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
Platform: | Size: 4731904 | Author: 李华 | Hits:

[MPI] v2_fifo_vhd_258

Description: 这是一个基于xilinx ISE9.1的一个历程，包含两个FIFO代码，第一个FIFO读写用同一个时钟，第二个FIFO读写用不同的时钟。-This is a xilinx ISE9.1 based on a course code consists of two FIFO, the first FIFO read and write using the same clock, the second FIFO read and write with a different clock.
Platform: | Size: 92160 | Author: muerqing | Hits:

[SCM] OS_Sieral_OK_(fifo)

Description: 这是本人调用small rtos51的函数来仿真写的基本代码-This is a small rtos51 I call a function to write the basic code simulation
Platform: | Size: 84992 | Author: 赵文选 | Hits:

[OS Develop] code

Description: Simulation and Synthesis Techniques for synchronous FIFO Design
Platform: | Size: 2048 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] asynchronous-FIFO-structure

Description:
Platform: | Size: 545792 | Author: john | Hits:

[VHDL-FPGA-Verilog] CuFIFO

Description: fifo的vhdl代码,比较简单，适合初学。-fifo the VHDL code, is relatively simple, suitable for beginners.
Platform: | Size: 1024 | Author: billfan | Hits:

[Windows Develop] sdh

Description: SDH是现代光纤通信中广泛应用的数据传输格式,在SDH帧结构中，前9列为开销字节，它包含了很多重要的信息，本程序为SDH开销的接收处理，查找帧头，分频，勤务话字节E1异步fifo。可拆为三段源代码，不知道能不能抵三个程序-SDH is a modern optical fiber communication is widely used in data transmission format, in the SDH frame structure, as the former 9 overhead bytes, it contains a lot of important information, the procedures for receiving SDH overhead processing, search header, sub-frequency ,勤務if E1 asynchronous byte fifo. Removable for three source code, I do not know the three procedures can be arrived
Platform: | Size: 6144 | Author: 韩冰 | Hits:

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[SCM] IA4420FIFO(C51)

[OS Develop] pm

[VHDL-FPGA-Verilog] VHDL-ram_fifo

[VHDL-FPGA-Verilog] yibufifo

[Driver Develop] isotransfer

[source in ebook] VHDL

[USB develop] usb

[MPI] v2_fifo_vhd_258

[SCM] OS_Sieral_OK_(fifo)

[OS Develop] code

[VHDL-FPGA-Verilog] asynchronous-FIFO-structure

[VHDL-FPGA-Verilog] CuFIFO

[Windows Develop] sdh

[OS Develop] asyn_fifo

[SCM] FX2_Slave_FIFO

[Program doc] vhdlfi

[VHDL-FPGA-Verilog] 75448172geleicounter

[USB develop] bulkloop

[VHDL-FPGA-Verilog] myfifo

[OS Develop] myfifo_bb

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